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» Report on INEX 2009
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DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 6 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
DATE
2009
IEEE
81views Hardware» more  DATE 2009»
15 years 6 months ago
ReSim, a trace-driven, reconfigurable ILP processor simulator
— Modern processors are becoming more complex and as features and application size increase, their evaluation is becoming more time-consuming. To date, design space exploration r...
Sotiria Fytraki, Dionisios N. Pnevmatikatos
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
15 years 6 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya
DSN
2009
IEEE
15 years 6 months ago
Stretching gossip with live streaming
Gossip-based information dissemination protocols are considered easy to deploy, scalable and resilient to network dynamics. They are also considered highly flexible, namely tunab...
Davide Frey, Rachid Guerraoui, Anne-Marie Kermarre...
FCCM
2009
IEEE
169views VLSI» more  FCCM 2009»
15 years 6 months ago
RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function
BLASTn is a tool universally used by biologists to identify similarities between nucleotide based biological genome sequences. This report describes an FPGA based hardware impleme...
Siddhartha Datta, Parag Beeraka, Ron Sass