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ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
15 years 9 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
FUN
2007
Springer
80views Algorithms» more  FUN 2007»
15 years 9 months ago
The Traveling Beams Optical Solutions for Bounded NP-Complete Problems
Architectures for optical processors designed to solve bounded instances of NP-Complete problems are suggested. One approach mimics the traveling salesman by traveling beams that ...
Shlomi Dolev, Hen Fitoussi
ASPDAC
2004
ACM
113views Hardware» more  ASPDAC 2004»
15 years 8 months ago
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
Chi-Chou Kao, Yen-Tai Lai
APN
2006
Springer
15 years 8 months ago
Complete Finite Prefixes of Symbolic Unfoldings of Safe Time Petri Nets
Abstract. Time Petri nets have proved their interest in modeling realtime concurrent systems. Their usual semantics is defined in term of firing sequences, which can be coded in a ...
Thomas Chatain, Claude Jard
ATAL
2006
Springer
15 years 8 months ago
Exact solutions of interactive POMDPs using behavioral equivalence
We present a method for transforming the infinite interactive state space of interactive POMDPs (I-POMDPs) into a finite one, thereby enabling the computation of exact solutions. ...
Bharaneedharan Rathnasabapathy, Prashant Doshi, Pi...