CBR applications running in real domains can easily reach thousands of cases, which are stored in the case library. Retrieval times can increase greatly if the retrieval algorithm ...
Paulo Gomes, Francisco C. Pereira, Paulo Paiva, Nu...
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient f...
Shubhendu S. Mukherjee, Michael Kontz, Steven K. R...
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...
This paper presents experimental results for a parallel pipeline STAP system with I/O task implementation using the parallel file systems on the Intel Paragon and the IBM SP. In ...
Wei-keng Liao, Alok N. Choudhary, Donald Weiner, P...
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...