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EVOW
2001
Springer
15 years 4 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
ET
2000
145views more  ET 2000»
14 years 11 months ago
Fast Test Pattern Generation for Sequential Circuits Using Decision Diagram Representations
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...
Jaan Raik, Raimund Ubar
DAC
2000
ACM
16 years 18 days ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
ITC
2003
IEEE
127views Hardware» more  ITC 2003»
15 years 4 months ago
Testing of Droplet-Based Microelectrofluidic Systems
Composite microsystems that integrate mechanical and fluidic components are fast emerging as the next generation of system-on-chip designs. As these systems become widespread in s...
Fei Su, Sule Ozev, Krishnendu Chakrabarty
ECRTS
2007
IEEE
15 years 6 months ago
Thermal Faults Modeling Using a RC Model with an Application to Web Farms
Today’s CPUs consume a significant amount of power and generate a high amount of heat, requiring an active cooling system to support reliable operations. In case of cooling sys...
Alexandre P. Ferreira, Daniel Mossé, Jae C....