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SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 11 months ago
A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs
—This paper describes a multi-threaded parallel design and implementation of the Smith-Waterman (SM) algorithm on compute unified device architecture (CUDA)-compatible graphic pr...
Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada
IEEEPACT
2008
IEEE
15 years 10 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
BROADNETS
2007
IEEE
15 years 10 months ago
Dedicated path protection for waveband switching in WDM networks (invited paper)
— This paper considers the problem of dedicated path-protection in a wavelength-division multiplexing (WDM) mesh network with waveband switching (WBS) functionality under shared ...
Mengke Li, Byrav Ramamurthy
CGO
2010
IEEE
15 years 9 months ago
Contention aware execution: online contention detection and response
Cross-core application interference due to contention for shared on-chip and off-chip resources pose a significant challenge to providing application level quality of service (Qo...
Jason Mars, Neil Vachharajani, Robert Hundt, Mary ...
DAC
2010
ACM
15 years 8 months ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov