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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 1 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
152
Voted
SOSP
2005
ACM
16 years 1 months ago
Implementing declarative overlays
Overlay networks are used today in a variety of distributed systems ranging from file-sharing and storage systems to communication infrastructures. However, designing, building a...
Boon Thau Loo, Tyson Condie, Joseph M. Hellerstein...
SOSP
2007
ACM
16 years 1 months ago
Information flow control for standard OS abstractions
ion Flow Control for Standard OS Abstractions Maxwell Krohn Alexander Yip Micah Brodsky Natan Cliffer M. Frans Kaashoek Eddie Kohler† Robert Morris MIT CSAIL †UCLA http://flum...
Maxwell N. Krohn, Alexander Yip, Micah Z. Brodsky,...
139
Voted
SOSP
2009
ACM
16 years 1 months ago
Fast byte-granularity software fault isolation
Bugs in kernel extensions remain one of the main causes of poor operating system reliability despite proposed techniques that isolate extensions in separate protection domains to ...
Miguel Castro, Manuel Costa, Jean-Philippe Martin,...
206
Voted
TLDI
2010
ACM
247views Formal Methods» more  TLDI 2010»
16 years 1 months ago
F-ing modules
ML modules are a powerful language mechanism for decomposing programs into reusable components. Unfortunately, they also have a reputation for being “complex” and requiring fa...
Andreas Rossberg, Claudio V. Russo, Derek Dreyer
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