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» Results on Reasoning about Updates in Transaction Logic
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PLDI
2010
ACM
15 years 3 months ago
Adversarial memory for detecting destructive races
Multithreaded programs are notoriously prone to race conditions, a problem exacerbated by the widespread adoption of multi-core processors with complex memory models and cache coh...
Cormac Flanagan, Stephen N. Freund
97
Voted
ICSE
2010
IEEE-ACM
15 years 6 days ago
DETERMIN: inferring likely deterministic specifications of multithreaded programs
The trend towards multicore processors and graphic processing units is increasing the need for software that can take advantage of parallelism. Writing correct parallel programs u...
Jacob Burnim, Koushik Sen
COORDINATION
2008
Springer
15 years 1 days ago
A Process Calculus for Mobile Ad Hoc Networks
We present the -calculus, a process calculus for formally modeling and reasoning about Mobile Ad Hoc Wireless Networks (MANETs) and their protocols. The -calculus naturally capture...
Anu Singh, C. R. Ramakrishnan, Scott A. Smolka
FOAL
2008
ACM
14 years 11 months ago
Incremental analysis of interference among aspects
Often, insertion of several aspects into one system is desired and in that case the problem of interference among the different aspects might arise, even if each aspect individual...
Emilia Katz, Shmuel Katz
98
Voted
TOPLAS
2008
138views more  TOPLAS 2008»
14 years 10 months ago
Decomposing bytecode verification by abstract interpretation
act Interpretation C. BERNARDESCHI, N. DE FRANCESCO, G. LETTIERI, L. MARTINI, and P. MASCI Universit`a di Pisa Bytecode verification is a key point in the security chain of the Jav...
Cinzia Bernardeschi, Nicoletta De Francesco, Giuse...