57 search results - page 2 / 12 » Retiming and clock scheduling for digital circuit optimizati... |
ICCD
1997
IEEE
13 years 10 months ago
1997
IEEE
Abstract— In this paper we consider the problem of clustering sequential circuits subject to a bound on the area of each cluster, with the objective of minimizing the clock perio...
DAC
1997
ACM
13 years 10 months ago
1997
ACM
The concept of improving the timing behavior of a circuit by relocating flip-flops is called retiming and was first presented by Leiserson and Saxe. The ASTRA algorithm propose...
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
ISSS
1998
IEEE
13 years 10 months ago
1998
IEEE
With the decreasing feature sizes during VLSI fabrication and the dominance of interconnect delay over that of gates, control logic and wiring no longer have a negligible impact o...
ISPD
2004
ACM
13 years 11 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...