34 search results - page 3 / 7 » Reusing Scan Chains for Test Pattern Decompression |
81
Voted
VTS
1997
IEEE
15 years 1 months ago
1997
IEEE
A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking ex...
90
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
80
Voted
ATS
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we present test generation procedures to improve scan chain failure diagnosis. The proposed test generation procedures improve diagnostic resolution by using multi-...
66
Voted
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
ICCD
1999
IEEE
15 years 1 months ago
1999
IEEE
If a system-on-a-chip (SOC) contains an embedded processor, this paper presents a novel approach for using the processor to aid in testing the other components of the SOC. The bas...