One of the main reasons for the difficulty of hardware verification is that hardware platforms are typically nondeterministic at clock-cycle granularity. Uninitialized state ele...
Smruti R. Sarangi, Brian Greskamp, Josep Torrellas
In this paper, we propose a new technique for hardware accelerated multi-resolution geometry synthesis. The level of detail for a given viewpoint is created on-the-fly, allowing f...
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
Richard Hough, Praveen Krishnamurthy, Roger D. Cha...
Partitioning fragment shaders into multiple rendering passes is an effective technique for virtualizing shading resource limits in graphics hardware. The Recursive Dominator Split...
A significant obstacle to the widespread adoption of FPGAbased configurable computing hardware has been the difficulty of mapping applications onto this hardware. We are developin...
Benjamin A. Levine, Senthil Natarajan, Chandra Tan...