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VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
15 years 3 months ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
ICPR
2008
IEEE
15 years 11 months ago
Distance transformation, reverse distance transformation and discrete medial axis on toric spaces
In this paper, we present optimal in time algorithms to compute the distance transform, the reverse distance transform and the discrete medial axis on digital objects embedded on ...
David Coeurjolly
PADS
2005
ACM
15 years 3 months ago
Optimistic Parallel Discrete Event Simulations of Physical Systems Using Reverse Computation
Efficient computer simulation of complex physical phenomena has long been challenging due to their multiphysics and multi-scale nature. In contrast to traditional time-stepped exe...
Yarong Tang, Kalyan S. Perumalla, Richard M. Fujim...
CIBCB
2005
IEEE
15 years 3 months ago
Heuristic Algorithm for Computing Reversal Distance with MultiGene Families via Binary Integer Programming
— Hannenhalli and Pevzner developed the first polynomial-time algorithm for the combinatorial problem of sorting of signed genomic data. Their algorithm solves the minimum numbe...
Jakkarin Suksawatchon, Chidchanok Lursinsap, Mikae...
CORR
2010
Springer
196views Education» more  CORR 2010»
14 years 9 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...