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90
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ERSA
2006
102views Hardware» more  ERSA 2006»
14 years 11 months ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
122
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NCA
2006
IEEE
14 years 10 months ago
Evolutionary training of hardware realizable multilayer perceptrons
The use of multilayer perceptrons (MLP) with threshold functions (binary step function activations) greatly reduces the complexity of the hardware implementation of neural networks...
Vassilis P. Plagianakos, George D. Magoulas, Micha...
CGF
2002
103views more  CGF 2002»
14 years 10 months ago
Hardware Accelerated Interactive Vector Field Visualization: A level of detail approach
This paper presents an interactive global visualization technique for dense vector fields using levels of detail. We introduce a novel scheme which combines an error-controlled hi...
Udeepta Bordoloi, Han-Wei Shen
80
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CISS
2011
IEEE
14 years 1 months ago
Hardware accelerated visual attention algorithm
— We present a hardware-accelerated implementation of a bottom-up visual attention algorithm. This algorithm generates a multi-scale saliency map from differences in image intens...
Polina Akselrod, Faye Zhao, Ifigeneia Derekli, Cl&...
107
Voted
HPCA
2012
IEEE
13 years 5 months ago
Pacman: Tolerating asymmetric data races with unintrusive hardware
Data races are a major contributor to parallel software unreliability. A type of race that is both common and typically harmful is the Asymmetric data race. It occurs when at leas...
Shanxiang Qi, Norimasa Otsuki, Lois Orosa Nogueira...