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GECCO
2005
Springer
232views Optimization» more  GECCO 2005»
15 years 4 months ago
A hardware pipeline for function optimization using genetic algorithms
Genetic Algorithms (GAs) are very commonly used as function optimizers, basically due to their search capability. A number of different serial and parallel versions of GA exist. ...
Malay Kumar Pakhira, Rajat K. De
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 4 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
CSE
2009
IEEE
15 years 2 months ago
Hardware Containers for Software Components: A Trusted Platform for COTS-Based Systems
Abstract--Much of modern software development consists of assembling together existing software components and writing the glue code that integrates them into a unified application...
Eugen Leontie, Gedare Bloom, Bhagirath Narahari, R...
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
13 years 6 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
VIS
2006
IEEE
214views Visualization» more  VIS 2006»
16 years 1 days ago
Hub-based Simulation and Graphics Hardware Accelerated Visualization for Nanotechnology Applications
The Network for Computational Nanotechnology (NCN) has developed a science gateway at nanoHUB.org for nanotechnology education and research. Remote users can browse through online...
Wei Qiao, Michael McLennan, Rick Kennell, David...