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VLSISP
2010
148views more  VLSISP 2010»
14 years 9 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
IEEEPACT
2009
IEEE
14 years 8 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
HPCA
2009
IEEE
15 years 11 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
DSN
2005
IEEE
15 years 4 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
DAC
2008
ACM
15 years 17 days ago
SHIELD: a software hardware design methodology for security and reliability of MPSoCs
Security of MPSoCs is an emerging area of concern in embedded systems. Security is jeopardized by code injection attacks, which are the most common types of software attacks. Prev...
Krutartha Patel, Sri Parameswaran