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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 26 days ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
SIGCOMM
2009
ACM
15 years 5 months ago
Crossbow: from hardware virtualized NICs to virtualized networks
This paper describes a new architecture for achieving network virtualization using virtual NICs (VNICs) as the building blocks. The VNICs can be associated with dedicated and inde...
Sunay Tripathi, Nicolas Droux, Thirumalai Srinivas...
82
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FPL
2004
Springer
109views Hardware» more  FPL 2004»
15 years 4 months ago
Hardware Accelerated Novel Protein Identification
The proteins in living organisms perform almost every significant function that governs life. A protein's functionality depends upon its physical structure, which depends on i...
Anish Alex, Jonathan Rose, Ruth Isserlin-Weinberge...
CHARME
2001
Springer
98views Hardware» more  CHARME 2001»
15 years 3 months ago
Hardware Synthesis Using SAFL and Application to Processor Design
Abstract. We survey the work done so far in the FLaSH project (Functional Languages for Synthesising Hardware) in which the core ideas are (i) using a functional language SAFL to d...
Alan Mycroft, Richard Sharp
ARC
2007
Springer
102views Hardware» more  ARC 2007»
15 years 2 months ago
Reconfigurable Hardware Acceleration of Canonical Graph Labelling
Many important algorithms in computational biology and related subjects rely on the ability to extract and to identify sub-graphs of larger graphs; an example is to find common fun...
David B. Thomas, Wayne Luk, Michael Stumpf