Sciweavers

7262 search results - page 365 / 1453
» Reversible Computer Hardware
Sort
View
118
Voted
COMPUTER
1998
119views more  COMPUTER 1998»
15 years 3 months ago
Virtual Memory: Issues of Implementation
ion layer3,4 hides hardware particulars from the higher levels of software but can also compromise performance and compatibility; the higher levels of software often make unwitting...
Bruce L. Jacob, Trevor N. Mudge
94
Voted
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
15 years 10 months ago
An 830mW, 586kbps 1024-bit RSA chip design
This paper presents an RSA hardware design that simultaneously achieves high-performance and lowpower. A bit-oriented, split modular multiplication algorithm and architecture are ...
Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shy...
EH
2002
IEEE
129views Hardware» more  EH 2002»
15 years 9 months ago
The BioWall: An Electronic Tissue for Prototyping Bio-Inspired Systems
In this article, we present the BioWall, a giant reconfigurable computing tissue developed to implement machines according to the principles of our Embryonics (embryonic electroni...
Gianluca Tempesti, Daniel Mange, André Stau...
DAC
2006
ACM
15 years 7 months ago
IMPRES: integrated monitoring for processor reliability and security
Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even `trusted so...
Roshan G. Ragel, Sri Parameswaran
151
Voted
DCC
2008
IEEE
15 years 5 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...