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DAC
2008
ACM
15 years 10 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
HICSS
2006
IEEE
131views Biometrics» more  HICSS 2006»
15 years 3 months ago
Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms
— Software protection is increasingly necessary for uses in commercial systems, digital content distributors, and military systems. The Secure Software (SecSoft) architecture is ...
Anthony J. Mahar, Peter M. Athanas, Stephen D. Cra...
ICRA
2000
IEEE
180views Robotics» more  ICRA 2000»
15 years 2 months ago
Interactive Motion Planning Using Hardware-Accelerated Computation of Generalized Voronoi Diagrams
We present techniques for fast motion planning by using discrete approximations of generalized Voronoi diagrams, computed with graphics hardware. Approaches based on this diagram ...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
SAMOS
2010
Springer
14 years 8 months ago
Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators
Abstract—Geometric Algebra (GA), a generalization of quaternions, is a very powerful form for intuitively expressing and manipulating complex geometric relationships common to en...
Jens Huthmann, Peter Muller, Florian Stock, Dietma...
DICTA
2003
14 years 11 months ago
Computing Image-Based Reprojection Error on Graphics Hardware
This paper describes a novel approach to the problem of recovering information from an image set by comparing the radiance of hypothesised point correspondences. This method is app...
John W. Bastian, Anton van den Hengel