7262 search results - page 406 / 1453 » Reversible Computer Hardware |
140
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ERSA
2009
15 years 2 months ago
2009
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
226
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FPL
2011
Springer
14 years 3 months ago
2011
Springer
In this paper two compact hardware structures for the computation of the CLEFIA encryption algorithm are presented. One structure based on the existing state of the art and a nove...
134
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ASAP
2007
IEEE
15 years 8 months ago
2007
IEEE
Monte-Carlo simulations are used in many applications, such as option pricing and portfolio evaluation. Due to their high computational load and intrinsic parallelism, they are id...
141
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CODES
2007
IEEE
15 years 8 months ago
2007
IEEE
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
DATE
2009
IEEE
15 years 11 months ago
2009
IEEE
This paper explores the use of SAT-Modulo Theory in determination of bit-widths for finite precision implementation of numerical calculations, specifically in the context of sci...