— An image sensor with focal plane based hardware acceleration of video compression is presented. The 90×90 pixel CMOS image sensor provides in-pixel processing of intensity cha...
Yu M. Chi, Ralph Etienne-Cummings, Gert Cauwenberg...
We present the initial results from the FHPCA Supercomputer project at the University of Edinburgh. The project has successfully built a general-purpose 64 FPGA computer and porte...
Robert Baxter, Stephen Booth, Mark Bull, Geoff Caw...
Financial and commercial applications use decimal data and spend most of their time in decimal arithmetic. Software implementation of decimal arithmetic is typically at least 100 ...
The Logarithmic Number System (LNS) makes multiplication, division and powering easy, but subtraction is expensive. Cotransformation converts the difficult operation of logarithm...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...