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RTCSA
2005
IEEE
15 years 10 months ago
Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
We present an approach to the analysis and optimization of heterogeneous distributed embedded systems for hard real-time applications. The systems are heterogeneous not only in te...
Traian Pop, Paul Pop, Petru Eles, Zebo Peng
ICES
2005
Springer
138views Hardware» more  ICES 2005»
15 years 10 months ago
A Flexible On-Chip Evolution System Implemented on a Xilinx Virtex-II Pro Device
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
Kyrre Glette, Jim Torresen
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
15 years 10 months ago
FPGA-Based Implementation of a Serial RSA Processor
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
Antonino Mazzeo, Luigi Romano, Giacinto Paolo Sagg...
DFT
2003
IEEE
246views VLSI» more  DFT 2003»
15 years 10 months ago
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
Konstantinos Rokas, Yiorgos Makris, Dimitris Gizop...
IEEEPACT
2003
IEEE
15 years 10 months ago
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures
This paper describes Compiler-Directed Content-Aware Prefetching (CDCAP), an integrated compiler and hardware approach for prefetching dynamic data structures. The approach utiliz...
Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors