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132
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
We consider the implication of deep sub-micron VLSI technology on the design of communication frameworks for parallel DSP systems-on-chip. We assert that distributed data transfer...
136
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...
110
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DSD
2002
IEEE
15 years 9 months ago
2002
IEEE
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
128
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EH
2002
IEEE
15 years 9 months ago
2002
IEEE
The paper proposes an architecture for building immunochips and provides a mathematical framework in describing some of its operations using the concepts of proteins and immune ne...
133
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ITC
2002
IEEE
15 years 9 months ago
2002
IEEE
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...