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SPIN
2007
Springer
16 years 7 days ago
Scalable Multi-core LTL Model-Checking
Recent development in computer hardware has brought more wide-spread emergence of shared-memory, multi-core systems. These architectures offer opportunities to speed up various ta...
Jiri Barnat, Lubos Brim, Petr Rockai
140
Voted
IMSCCS
2006
IEEE
16 years 5 days ago
Verification Environment for a SCMP Architecture
The computer architecture of Single-chip multiprocessor (SCMP) is one of important research topics in developing the next-generation of computer hardware. A verification environme...
Wenbin Yao, Nianmin Yao, Shaobin Cai, Jun Ni
125
Voted
ISCAS
2006
IEEE
129views Hardware» more  ISCAS 2006»
16 years 5 days ago
Circular array based 2D recursive filtering using a spatio-temporal helix transform
— a form-preserving 2D z-domain helix transform is proposed for the synthesis of computable practical-BIBO stable 2D recursive filters computed over uniformly-spaced circular inp...
Arjuna Madanayake, Leonard T. Bruton
ASPDAC
2006
ACM
122views Hardware» more  ASPDAC 2006»
16 years 3 days ago
Reusable component IP design using refinement-based design environment
- We propose a method of enhancing the reusability of the component IPs by separating communication and computation for a system function. In this approach, we assume that the comp...
Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae
ATVA
2005
Springer
108views Hardware» more  ATVA 2005»
15 years 11 months ago
Flat Acceleration in Symbolic Model Checking
Abstract. Symbolic model checking provides partially effective verification procedures that can handle systems with an infinite state space. So-called “acceleration techniques...
Sébastien Bardin, Alain Finkel, Jér&...