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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 10 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ICS
1999
Tsinghua U.
15 years 10 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
141
Voted
IPPS
1998
IEEE
15 years 10 months ago
PULC: ParaStation User-Level Communication. Design and Overview
PULC is a user-level communication library for workstation clusters. PULC provides a multi-user, multi-programming communication library for user level communication on top of high...
Joachim M. Blum, Thomas M. Warschko, Walter F. Tic...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 10 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
SAC
1998
ACM
15 years 10 months ago
Applying videogame technologies to video conferencing systems
We have developed a desktop meeting environment named FreeWalk that supports casual meetings in a 3-dimensional (3D) virtual shared space, community common. Tools for human commun...
Toshikazu Nishimura, Hideyuki Nakanishi, Chikara Y...