7262 search results - page 572 / 1453 » Reversible Computer Hardware |
180
click to vote
ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
153
Voted
ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Optimizing array accesses is extremely critical in embedded computing as many embedded applications make use of arrays (in form of images, video frames, etc). Previous research co...
180
Voted
ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
144
Voted
ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...
162
Voted
ICCAD
2002
IEEE
16 years 3 months ago
2002
IEEE
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...