7262 search results - page 581 / 1453 » Reversible Computer Hardware |
111
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ICCD
2007
IEEE
16 years 21 days ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
156
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ISCA
2007
IEEE
16 years 20 days ago
2007
IEEE
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
161
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ISCAS
2007
IEEE
16 years 20 days ago
2007
IEEE
- This paper aims at discussing the implementation of simulation systems for SNN based on analog computation cores (neuromimetic ICs). Such systems are an alternative to completely...
163
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ISQED
2007
IEEE
16 years 20 days ago
2007
IEEE
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
178
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ISQED
2007
IEEE
16 years 20 days ago
2007
IEEE
ct This paper develops an aggregation-based algebraic multigrid (AbAMG) method to efficiently analyze the power grids. Different from the conventional algebraic multigrid (AMG) sc...