Sciweavers

7262 search results - page 584 / 1453
» Reversible Computer Hardware
Sort
View
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
16 years 14 days ago
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)
In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computat...
Javier Davila, Alfonso de Torres, Jose Manuel Sanc...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
16 years 14 days ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...
153
Voted
DATE
2006
IEEE
116views Hardware» more  DATE 2006»
16 years 14 days ago
Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation
This paper presents a systematic and optimal design of hybrid cascode compensation method which is used in fully differential two-stage CMOS operational transconductance amplifier...
Mohammad Yavari, Omid Shoaei, Ángel Rodr&ia...
ECBS
2006
IEEE
143views Hardware» more  ECBS 2006»
16 years 14 days ago
Requirements Engineering for the Adviser Portal Bank System
The Adviser Portal (AP) is a new IT system for 15 Danish banks. The main goal of AP is to increase the efficiency and quality of bank advisers’ work. Requirements engineering fo...
Jens Bæk Jørgensen, Kristian Bisgaard...
ETS
2006
IEEE
93views Hardware» more  ETS 2006»
16 years 14 days ago
Retention-Aware Test Scheduling for BISTed Embedded SRAMs
In this paper we address the test scheduling problem for Builtin Self-tested (BISTed) embedded SRAMs (e-SRAMs) when Data Retention Faults (DRFs) are considered. The proposed test ...
Qiang Xu, Baosheng Wang, F. Y. Young