Sensor network applications face continuously changing environments, which impose varying processing loads on the sensor node. This paper presents an online control method which a...
This paper describes two research projects that develop new low-cost techniques for testing devices with multiple high-speed (2 to 5 Gbps) signals. Each project uses commercially ...
Assessing IC manufacturing process fluctuations and their impacts on IC interconnect performance has become unavoidable for modern DSM designs. However, the construction of parame...
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, S...
A class of discrete event synthesis problems can be reduced to solving language equations F • X ⊆ S, where F is the fixed component and S the specification. Sequential synthes...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
1 This paper presents a method for power-constrained system-on-chip test scheduling in an abort-on-first-fail environment where the test is terminated as soon as a fault is detecte...