7262 search results - page 596 / 1453 » Reversible Computer Hardware |
140
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DAC
2009
ACM
15 years 11 months ago
2009
ACM
A typical hardware development flow starts the verification process concurrently with RTL, but the overall schedule becomes limited by the effort required to complete all the nece...
159
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...
135
Voted
FPL
2009
Springer
15 years 11 months ago
2009
Springer
Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators...
131
Voted
FPL
2009
Springer
15 years 11 months ago
2009
Springer
The reconfigurable mesh model for massively parallel computing has recently been rediscovered and proposed as the basis of a practical many-core architecture. With this paper, we...
135
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FPL
2001
Springer
15 years 11 months ago
2001
Springer
We present an implementation of a complete RLS Lattice and Normalised RLS Lattice cores for Virtex. The cores accept 24-bit fixed point inputs and produce 24-bit fixed point predic...