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PACS
2000
Springer
110views Hardware» more  PACS 2000»
15 years 10 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
15 years 10 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
ICCAD
1995
IEEE
95views Hardware» more  ICCAD 1995»
15 years 10 months ago
A sequential quadratic programming approach to concurrent gate and wire sizing
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
ICCD
1995
IEEE
85views Hardware» more  ICCD 1995»
15 years 10 months ago
A high-performance asynchronous SCSI controller
We describe thedesign of a high performance asynchronous SCSI Small Computer Systems Interface controller data path and the associated control circuits. The data path is an asyn...
Kenneth Y. Yun, David L. Dill
ISLPED
1995
ACM
80views Hardware» more  ISLPED 1995»
15 years 10 months ago
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...