Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
We describe thedesign of a high performance asynchronous SCSI Small Computer Systems Interface controller data path and the associated control circuits. The data path is an asyn...
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...