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ICCAD
2009
IEEE
123views Hardware» more  ICCAD 2009»
15 years 4 months ago
Multi-level clustering for clock skew optimization
Clock skew scheduling has been effectively used to reduce the clock period of sequential circuits. However, this technique may become impractical if a different skew must be appli...
Jonas Casanova, Jordi Cortadella
ICCAD
2009
IEEE
98views Hardware» more  ICCAD 2009»
15 years 4 months ago
A rigorous framework for convergent net weighting schemes in timing-driven placement
We present a rigorous framework that defines a class of net weighting schemes in which unconstrained minimization is successively performed on a weighted objective. We show that, ...
Tony F. Chan, Jason Cong, Eric Radke
ICCAD
2010
IEEE
176views Hardware» more  ICCAD 2010»
15 years 4 months ago
An auction based pre-processing technique to determine detour in global routing
Global Routing has been a traditional EDA problem. It has congestion elimination as the first and foremost priority. Despite of the recent development for popular rip-up and rerout...
Yue Xu, Chris Chu
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 3 months ago
A general mathematical model of probabilistic ripple-carry adders
Probabilistic CMOS is considered a promising technology for future generations of computing devices. By embracing possibly incorrect calculations, the technology makes it possible ...
Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Aru...
ARC
2011
Springer
220views Hardware» more  ARC 2011»
15 years 1 months ago
From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype
Abstract. In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation...
Nehir Sönmez, Oriol Arcas, Gokhan Sayilar, Os...