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175
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IPPS
2005
IEEE
16 years 9 days ago
2005
IEEE
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
167
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VISUALIZATION
2005
IEEE
16 years 8 days ago
2005
IEEE
We describe a new dynamic level-of-detail (LOD) technique that allows real-time rendering of large tetrahedral meshes. Unlike approaches that require hierarchies of tetrahedra, ou...
158
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RT
2005
Springer
16 years 6 days ago
2005
Springer
Fast global illumination computation is a challenge in several fields such as lighting simulation and computergenerated visual effects for movies. To this end, the irradiance cac...
172
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ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
206
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ISPD
1999
ACM
15 years 11 months ago
1999
ACM
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...