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ASAP
2008
IEEE
199views Hardware» more  ASAP 2008»
15 years 9 months ago
An efficient method for evaluating polynomial and rational function approximations
In this paper we extend the domain of applicability of the E-method [7, 8], as a hardware-oriented method for evaluating elementary functions using polynomial and rational functio...
Nicolas Brisebarre, Sylvain Chevillard, Milos D. E...
ASPDAC
2005
ACM
133views Hardware» more  ASPDAC 2005»
15 years 9 months ago
A novel O(n) parallel banker's algorithm for System-on-a-Chip
This paper proposes a novel O(n) Parallel Banker’s Algorithm (PBA) with a best-case run-time of O(1), reduced from an ¢¤£¦¥¨§© run-time complexity of the original Ban...
Jaehwan John Lee, Vincent John Mooney III
DSD
2008
IEEE
147views Hardware» more  DSD 2008»
15 years 8 months ago
A Low-Cost Cache Coherence Verification Method for Snooping Systems
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
Demid Borodin, Ben H. H. Juurlink
BCSHCI
2008
15 years 8 months ago
Eunomia: toward a framework for multi-touch information displays in public spaces
Multi-touch interaction techniques are becoming more widespread because of new industrial initiatives to make this hardware available and affordable for the consumer market. To co...
Tom Cuypers, Jan Schneider, Johannes Taelman, Kris...
CDES
2006
101views Hardware» more  CDES 2006»
15 years 8 months ago
Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors
- Error detection plays an important role in fault-tolerant computer systems. Two primary parameters concerned for error detection are the latency and coverage. In this paper, a ne...
Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin