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DATE
2010
IEEE
154views Hardware» more  DATE 2010»
16 years 5 days ago
ERSA: Error Resilient System Architecture for probabilistic applications
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. J...
DATE
2010
IEEE
182views Hardware» more  DATE 2010»
16 years 5 days ago
Fault-based attack of RSA authentication
For any computing system to be secure, both hardware and software have to be trusted. If the hardware layer in a secure system is compromised, not only it would be possible to ext...
Andrea Pellegrini, Valeria Bertacco, Todd M. Austi...
SP
2010
IEEE
158views Security Privacy» more  SP 2010»
15 years 11 months ago
Tamper Evident Microprocessors
Abstract—Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors...
Adam Waksman, Simha Sethumadhavan
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
15 years 10 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
CASES
2010
ACM
15 years 5 months ago
Implementing virtual secure circuit using a custom-instruction approach
Although cryptographic algorithms are designed to resist at least thousands of years of cryptoanalysis, implementing them with either software or hardware usually leaks additional...
Zhimin Chen, Ambuj Sinha, Patrick Schaumont