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» Reversible Fault-Tolerant Logic
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HASE
2007
IEEE
14 years 19 days ago
Advances in Quantum Computing Fault Tolerance and Testing
We study recent developments in quantum computing (QC) testing and fault tolerance (FT) techniques and discuss several attempts to formalize quantum logic fault models. We illustr...
David Y. Feinstein, V. S. S. Nair, Mitchell A. Tho...
ICES
2007
Springer
88views Hardware» more  ICES 2007»
13 years 8 months ago
Evolving and Analysing "Useful" Redundant Logic
Abstract. Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to ...
Asbjørn Djupdal, Pauline C. Haddow
CADE
2007
Springer
14 years 6 months ago
Symbolic Fault Injection
Fault tolerance mechanisms are a key ingredient of dependable systems. In particular, software-implemented hardware fault tolerance (SIHFT) is gaining in popularity, because of its...
Daniel Larsson, Reiner Hähnle
ISMVL
2007
IEEE
245views Hardware» more  ISMVL 2007»
14 years 18 days ago
Fault Tolerant CMOS Logic Using Ternary Gates
In this paper we present fault tolerant CMOS logic using redundancy and ternary signals. The ternary gates are implemented using recharge logic which can be exploited in binary an...
Yngvar Berg, Renè Jensen, Johannes Goplen L...
ESOP
2010
Springer
14 years 3 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker