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» Reversible logic circuit synthesis
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ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
15 years 4 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...
VTS
2003
IEEE
115views Hardware» more  VTS 2003»
15 years 3 months ago
Fault Testing for Reversible Circuits
Irreversible computation necessarily results in energy dissipation due to information loss. While small in comparison to the power consumption of today’s VLSI circuits, if curre...
Ketan N. Patel, John P. Hayes, Igor L. Markov
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
15 years 2 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
82
Voted
DELTA
2006
IEEE
15 years 1 months ago
Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays
The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular struct...
Jia Di, Dilip P. Vasudevan
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
15 years 4 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...