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» Reversible logic circuit synthesis
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CORR
2010
Springer
152views Education» more  CORR 2010»
14 years 7 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
15 years 4 months ago
Masking timing errors on speed-paths in logic circuits
There is a growing concern about timing errors resulting from design marginalities and the effects of circuit aging on speed-paths in logic circuits. This paper presents a low ove...
Mihir R. Choudhury, Kartik Mohanram
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 2 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
15 years 3 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...
ICCD
1993
IEEE
124views Hardware» more  ICCD 1993»
15 years 2 months ago
Synthesis of Controllers from Interval Temporal Logic Specification
for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
Masahiro Fujita, Shinji Kono