Sciweavers

287 search results - page 35 / 58
» Reversible logic circuit synthesis
Sort
View
SAT
2007
Springer
121views Hardware» more  SAT 2007»
15 years 4 months ago
Applying Logic Synthesis for Speeding Up SAT
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
Niklas Eén, Alan Mishchenko, Niklas Sö...
DFT
1998
IEEE
78views VLSI» more  DFT 1998»
15 years 2 months ago
A System for Evaluating On-Line Testability at the RT-level
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
Silvia Chiusano, Fulvio Corno, Matteo Sonza Reorda...
TVLSI
1998
135views more  TVLSI 1998»
14 years 9 months ago
Wave-pipelining: a tutorial and research survey
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
Wayne P. Burleson, Maciej J. Ciesielski, Fabian Kl...
ASAP
2009
IEEE
119views Hardware» more  ASAP 2009»
15 years 1 months ago
A Low Power High Performance Radix-4 Approximate Squaring Circuit
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
Satyendra R. Datla, Mitchell A. Thornton, David W....
ITC
1995
IEEE
104views Hardware» more  ITC 1995»
15 years 1 months ago
Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
Nur A. Touba, Edward J. McCluskey