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» Reversible logic circuit synthesis
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DATE
2009
IEEE
141views Hardware» more  DATE 2009»
15 years 4 months ago
Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis
– The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects...
Shashikanth Bobba, Jie Zhang, Antonio Pullini, Dav...
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
15 years 1 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
15 years 10 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
CODES
2005
IEEE
15 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
TCAD
2008
81views more  TCAD 2008»
14 years 9 months ago
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
Stephen Plaza, Igor L. Markov, Valeria Bertacco