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» Reversible logic circuit synthesis
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DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 1 months ago
Synthesis of Reversible Logic
Abhinav Agrawal, Niraj K. Jha
ISVLSI
2002
IEEE
91views VLSI» more  ISVLSI 2002»
15 years 2 months ago
Efficient Adder Circuits Based on a Conservative Reversible Logic Gate
J. W. Bruce, Mitchell A. Thornton, L. Shivakumarai...
VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
15 years 3 months ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
ASPDAC
2005
ACM
80views Hardware» more  ASPDAC 2005»
14 years 12 months ago
Synthesis of quantum logic circuits
— The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits to the attention...
Vivek V. Shende, Stephen S. Bullock, Igor L. Marko...
TCAD
1998
82views more  TCAD 1998»
14 years 9 months ago
LOT: Logic Optimization with Testability. New transformations for logic synthesis
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...