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» Robustness and Implementability of Timed Automata
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75
Voted
ICCD
1995
IEEE
51views Hardware» more  ICCD 1995»
15 years 3 months ago
Implementing a STARI chip
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
Mark R. Greenstreet
RTAS
2005
IEEE
15 years 5 months ago
Timing Analysis of TCP Servers for Surviving Denial-of-Service Attacks
— Denial-of-service attacks are becoming more frequent and sophisticated. Researchers have proposed a variety of defenses, including better system configurations, infrastructure...
V. Krishna Nandivada, Jens Palsberg
ECCV
2008
Springer
16 years 1 months ago
A Comparative Analysis of RANSAC Techniques Leading to Adaptive Real-Time Random Sample Consensus
The Random Sample Consensus (RANSAC) algorithm is a popular tool for robust estimation problems in computer vision, primarily due to its ability to tolerate a tremendous fraction o...
Rahul Raguram, Jan-Michael Frahm, Marc Pollefeys
117
Voted
FPCA
1993
15 years 3 months ago
Benchmarking Implementations of Lazy Functional Languages
Five implementations of di erent lazy functional languages are compared using a common benchmark of a dozen medium size programs. The benchmarking procedure has been designed such...
Pieter H. Hartel, Koen Langendoen
99
Voted
RAM
2008
IEEE
172views Robotics» more  RAM 2008»
15 years 6 months ago
VT Position Code Communication Technology and Its Implementation
Eelectronic device technology has been monopolized by binary system for many years. The circs not only makes it impossible to break through the existing technology bottleneck, but...
ShiYing Zhou, GuiHe Qin, YuBo Jin