768 search results - page 15 / 154 » Robustness of Sequential Circuits |
DATE
1998
IEEE
15 years 2 months ago
1998
IEEE
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
ASPDAC
2008
ACM
14 years 12 months ago
2008
ACM
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
Abstract— Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored...
ICCAD
1997
IEEE
15 years 2 months ago
1997
IEEE
We consider the problem of built-in test generation for synchronous sequential circuits. The proposed scheme leaves the circuit flip-flops unmodified, and thus allows at-speed ...
VTS
1997
IEEE
15 years 2 months ago
1997
IEEE
Two fast algorithms for static test sequence compaction are proposed for sequential circuits. The algorithms are based on the observation that test sequences traverse through a sm...