Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A fram...
Based on qualitative analysis of three groups collaborating on a research task in a distributed setting, we identify four breakdowns in creativity: (1) Minority ideas were under-c...
Abstract. Positioned at the confluence between human/machine and hardware/software integration and backed by a solid proof of concept realized through several scenarios encompassin...