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DAC
2003
ACM
16 years 6 months ago
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
15 years 11 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
145
Voted
DATE
2003
IEEE
152views Hardware» more  DATE 2003»
15 years 10 months ago
Synthesis of CMOS Analog Cells Using AMIGO
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A fram...
Ramy Iskander, Mohamed Dessouky, Maie Aly, Mahmoud...
GROUP
2007
ACM
15 years 8 months ago
Supporting creativity with awareness in distributed collaboration
Based on qualitative analysis of three groups collaborating on a research task in a distributed setting, we identify four breakdowns in creativity: (1) Minority ideas were under-c...
Umer Farooq, John M. Carroll, Craig H. Ganoe
ATAL
2004
Springer
15 years 10 months ago
Adaptive Information Infrastructures for the e-Society
Abstract. Positioned at the confluence between human/machine and hardware/software integration and backed by a solid proof of concept realized through several scenarios encompassin...
Mihaela Ulieru