We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...
Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters,...
The counterflow pipeline architecture [12] consists of two interacting pipelines in which data items flow in opposite directions. Interactions occur between two items when they me...
Bill Coates, Jo C. Ebergen, Jon K. Lexau, Scott Fa...
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
The big challenge related to the contemporary research on ubiquitous and pervasive computing is that of seamless integration. For the next generation of ubiquitous and distributed...