57 search results - page 5 / 12 » Round-Robin Arbiter Design |
ASYNC
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper brings together a selection of creative circuit designs and ideas that Charles Molnar devised while working at Sun Microsystems Laboratories. The circuits offer fast im...
83
Voted
DAC
2006
ACM
15 years 10 months ago
2006
ACM
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
ICCD
2008
IEEE
15 years 6 months ago
2008
IEEE
— The need for efficient implementation of simple crossbar schedulers has increased in the recent years due to the advent of on-chip interconnection networks that require low la...
ANCS
2007
ACM
15 years 1 months ago
2007
ACM
Scheduling in large switches is challenging. Arbiters must operate at high rates to keep up with the high switching rates demanded by multi-gigabit-per-second link rates and short...