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» Routing Lookups in Hardware at Memory Access Speeds
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FPL
1998
Springer
99views Hardware» more  FPL 1998»
15 years 4 months ago
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators
This paper discusses the memory interface of custom computing machines. We present a high speed parallel memory for the MoM-PDA machine, which is based on the Xputer paradigm. The ...
Reiner W. Hartenstein, Michael Herz, Thomas Hoffma...
VLDB
1999
ACM
151views Database» more  VLDB 1999»
15 years 4 months ago
Cache Conscious Indexing for Decision-Support in Main Memory
As random access memory gets cheaper, it becomes increasingly affordable to build computers with large main memories. We consider decision support workloads within the context of...
Jun Rao, Kenneth A. Ross
AINA
2009
IEEE
15 years 6 months ago
A Pipelined IP Forwarding Engine with Fast Update
IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer ra...
Yeim-Kuan Chang, Yen-Cheng Liu, Fang-Chen Kuo
IEEEPACT
2007
IEEE
15 years 6 months ago
L1 Cache Filtering Through Random Selection of Memory References
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
Yoav Etsion, Dror G. Feitelson
CLUSTER
2006
IEEE
15 years 5 months ago
A Simple Synchronous Distributed-Memory Algorithm for the HPCC RandomAccess Benchmark
The RandomAccess benchmark as defined by the High Performance Computing Challenge (HPCC) tests the speed at which a machine can update the elements of a table spread across globa...
Steven J. Plimpton, Ron Brightwell, Courtenay Vaug...