149 search results - page 16 / 30 » Routing Lookups in Hardware at Memory Access Speeds |
JSA
2008
14 years 11 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
MSS
2000
IEEE
15 years 4 months ago
2000
IEEE
— We examine the primary challenges for building a practical and competitive holographic random access memory (HRAM) system, specifically size, speed, and cost. We show that a fa...
132
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SIGMETRICS
2008
ACM
14 years 11 months ago
2008
ACM
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
101
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MMNS
2000
15 years 1 months ago
2000
: This paper presents an evaluation of a traffic management mechanism for high speed networks called RDMA (Route Division Multiple Access), developed as part of the Isochronets, a ...
88
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DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...