Sciweavers

149 search results - page 22 / 30
» Routing Lookups in Hardware at Memory Access Speeds
Sort
View
ICC
2011
IEEE
237views Communications» more  ICC 2011»
13 years 11 months ago
Reorganized and Compact DFA for Efficient Regular Expression Matching
—Regular expression matching has become a critical yet challenging technique in content-aware network processing, such as application identification and deep inspection. To meet ...
Kai Wang, Yaxuan Qi, Yibo Xue, Jun Li
NOMS
2006
IEEE
146views Communications» more  NOMS 2006»
15 years 5 months ago
BGP-Inspect - Extracting Information from Raw BGP Data
— While BGP routing datasets, consisting of raw routing data, are freely available and easy to obtain, extracting any useful information is tedious. Currently, researcher and net...
Dionysus Blazakis, Manish Karir, John S. Baras
86
Voted
IPPS
2000
IEEE
15 years 4 months ago
Three Dimensional VLSI-Scale Interconnects
As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processo...
Dennis W. Prather
ISLPED
2005
ACM
98views Hardware» more  ISLPED 2005»
15 years 5 months ago
Synonymous address compaction for energy reduction in data TLB
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, M...
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
15 years 1 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...