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» Routing Lookups in Hardware at Memory Access Speeds
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VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
15 years 10 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria
INFOCOM
2003
IEEE
15 years 2 months ago
Adaptive Data Structures for IP Lookups
— The problem of efficient data structures for IP lookups has been well studied in literature. Techniques such as LC tries and Extensible Hashing are commonly used. In this pape...
Ioannis Ioannidis, Ananth Grama, Mikhail J. Atalla...
PLDI
1994
ACM
15 years 1 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
WMPI
2004
ACM
15 years 3 months ago
Addressing mode driven low power data caches for embedded processors
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
Ramesh V. Peri, John Fernando, Ravi Kolagotla
DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 3 months ago
Automating processor customisation: optimised memory access and resource sharing
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
Robert G. Dimond, Oskar Mencer, Wayne Luk