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VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
15 years 10 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
CORR
2007
Springer
132views Education» more  CORR 2007»
14 years 9 months ago
On Compact Routing for the Internet
The Internet’s routing system is facing stresses due to its poor fundamental scaling properties. Compact routing is a research field that studies fundamental limits of routing ...
Dmitri V. Krioukov, Kimberly C. Claffy, Kevin R. F...
EMMCVPR
2001
Springer
15 years 2 months ago
Matching Free Trees, Maximal Cliques, and Monotone Game Dynamics
—Motivated by our recent work on rooted tree matching, in this paper we provide a solution to the problem of matching two free (i.e., unrooted) trees by constructing an associati...
Marcello Pelillo
DATE
2002
IEEE
74views Hardware» more  DATE 2002»
15 years 2 months ago
Maze Routing with Buffer Insertion under Transition Time Constraints
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
Li-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao
ICCAD
2006
IEEE
126views Hardware» more  ICCAD 2006»
15 years 6 months ago
Optimizing yield in global routing
We present the first efficient approach to global routing that takes spacing-dependent costs into account and provably finds a near-optimum solution including these costs. We sh...
Dirk Müller