— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...
Overlay networks are used today in a variety of distributed systems ranging from file-sharing and storage systems to communication infrastructures. However, designing, building a...
Boon Thau Loo, Tyson Condie, Joseph M. Hellerstein...
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...